16 research outputs found

    Analysis and Design of a 32nm FinFET Dynamic Latch Comparator

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    Comparators have multifarious applications in various fields, especially used in analog to digital converters. Over the years, we have seen many different designs of single stage, dynamic latch type and double tail type comparators based on CMOS technology, and all of them had to make the tradeoff between power consumption and delay time. Meanwhile, to mitigate the short channel effects of conventional CMOS based design, FinFET has emerged as the most promising alternative by owning the tremendous gate control feature over the channel region. In this paper, we have analyzed the performance of some recent dynamic latch type comparators and proposed a new structure of dynamic latch comparator; moreover, 32nm FinFET technology has been considered as the common platform for all of the comparators circuit design. The proposed comparator has shown impressive performance in case of power consumption, time delay, power delay product and offset voltage while compared with the other recent comparators through simulations with LTspice.Comment: 6 pages, 13 figure

    Design of High-Speed Dual Port 8T SRAM Cell with Simultaneous and Parallel READ-WRITE Feature

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    An innovative 8 transistor (8T) static random access memory (SRAM) architecture with a simple and reliable read operation is presented in this study. LTspice software is used to implement the suggested topology in the 16nm predictive technology model (PTM). Investigations into and comparisons with conventional 6T, 8T, 9T, and 10T SRAM cells have been made regarding read and write operations\u27 delay and power consumption as well as power delay product (PDP). The simulation outcomes show that the suggested design offers the fastest read operation and PDP optimization overall. Compared to the current 6T and 9T topologies, the noise margin is also enhanced. Finally, the comparison of the figure of merit (FoM) indicates the best efficiency of the proposed design

    Face identification based on discrete wavelet transform and neural networks

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    The subject paper presents implementation of a new automatic face recognition system. To formulate an automated framework for the recognition of human faces is a highly challenging endeavor. The face identification problem is particularly very crucial in the context of today’s rapid emergence of technological advancements with ever expansive requirements. It has also significant relevance in the related engineering disciplines of computer graphics, pattern recognition, psychology, image processing and artificial neural networks. This paper proposes a side-view face authentication approach based on discrete wavelet transform and artificial neural networks for the solution of the problem. A subset determination strategy that expands on the number of training samples and permits protection of the global information is discussed. The authentication technique involves image profile extraction, decomposition of the wavelets, splitting of the subsets and finally neural network verification. The procedure exploits the localization property of the wavelets in both the frequency and spatial domains, while maintaining the generalized properties of the neural networks. The realization strategy of the methodology was executed using MATLAB, demonstrating that the performance of the technique is quite satisfactory

    Low power nMOS based memory cell

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    This research proposed a new type of memory cell designed by using only nMOS transistors. The memory cell consumes less power and also occupies minimum amount of silicon area. The stability of the data during successive read operation and noise margin are in the promising range. Extensive simulation results demonstrate the validity and competency of the proposed cell

    Pseudoxanthoma elasticum and nephrocalcinosis: Incidental finding or an infrequent manifestation?

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    Pseudoxanthoma elasticum (PXE) is an inherited disorder characterized by generalized fragmentation and progressive calcification of elastic tissue. We report two sporadic cases of PXE, both of whom presented with asymptomatic yellowish papules over the flexural sites for cosmetic reasons. Histopathological findings on hematoxylin and eosin and Verhoeff-Van Gieson (VVG) staining were classical of PXE. In addition to this, renal calcification was documented on plain radiography of kidneys, ureters, and bladder (KUB) in both the cases. Paucity of literature describing the association of nephrocalcinosis with PXE prompted the present report

    A low power dynamic logic with nMOS based resistive keeper circuit

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    Designing VLSI circuit using dynamic logic is one of the most area efficient techniques. However, the performance of the dynamic logic is not so promising due to longer time delay and higher leakage power. This research proposes a new model of dynamic logic by incorporating nMOS based resistive gate circuit. The proposed circuit reduces the contention time delay and the leakage power. Extensive simulation results using LTSpice tools demonstrate the validity and superiority of the proposed circuit

    Performance analysis of OTFT-based SRAM topologies

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    In terms of mechanical flexibility, organic SRAM offers better designs and a commercially feasible option with the ability to deliver acceptable performance. This paper investigates the implementation of different SRAM topologies based on organic thin film transistors (OTFTs). In this work, a compact spice model is used to simulate pOTFT and nOTFT in LTSpice software. Time delays, power consumption, the power delay product (PDP), and static noise margin (SNM) for read and write operations are calculated, and a comparative analysis of OTFT based 6T, 7T, 8T, and 9T SRAM topologies is performed. Among different topologies, 9T OTFT SRAM cell achieves a 1.67× increase in SNM, compared to conventional 6T OTFT-based SRAM cell. The highest figure of merit value of 9T SRAM cell indicates its suitability for various applications

    An Optimized Tongue Drive System for Disabled Persons

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    There has been dramatic increase in the number of people with physical disabilities in recent years. Many people with disabilities have substantial difficulties even moving their hands and legs. The disability has thus become a real challenge since most of the physically compromised people need some kind of assistance at all times. However, a tongue in a human body is one critical anatomical part which is very rarely affected by disabilities. To resolve the physical disability problem, various assistive technologies were taken into consideration with the main objective of allowing the disabled people to seamlessly communicate with their surrounding environments. One of the technologies which was made available for use by disabled people was a tongue drive system. But their existing designs involved some mechanical problems besides having accuracy issues. In the subject paper, we strive to implement an optimized tongue drive system for physically disabled persons that enables its users to generate more than eight distinct commands with the aid of artificial intelligence, thereby enabling the users a full command via a computer keyboard and mouse
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